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GAL®20RA10
The Lattice GAL®20RA10 is a Static Programmable Logic Device in a low-power CMOS process with 20 macrocells, and 12 I/O pins, and supports up to 10 combinational logic outputs.
The programming method of the chip is non-volatile programming, and it supports common EPROM programmers for programming.
It is mainly used in aerospace, military, communication, and medical fields, and can be used in various application scenarios such as control logic, interface control, state machine, and timing control.
At the same time, the Lattice GAL®20RA10 chip can also be used for configuration file memory of Field Programmable Gate Array (FPGA), and backup or fast recovery memory for Field Programmable Logic Gate Array (PLD).
