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Lattice MACH

The Lattice MACH family is a low-power, high-performance, programmable logic device with logic cells up to 100,000 gates and 2,000 bits of embedded memory.

This series of chips adopt an optimized interconnection architecture and advanced I/O standards and can support high-speed communication interfaces such as PCI Express, Gigabit Ethernet, and SDI.

In addition, the MACH series also provides rich clock management resources, including PLL, DLL, and frequency divider, to support the requirements of various clock sources and clock domains.

The Lattice MACH series is suitable for a variety of applications, such as communications, industrial automation, medical equipment, embedded computers, audio and video processing, and more.

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MACHLV210-15JC

EE PLD, 15NS, 64-CELL PQCC44

44-PLCC (16.59x16.59)

MACHLV210-15JC (PDF)

2,241

MACHLV210-12JC

EE PLD, 12NS, 64-CELL PQCC44

44-PLCC (16.59x16.59)

MACHLV210-12JC (PDF)

887

MACH130-15JC

EE PLD, 15NS, 64-CELL PQCC84

84-PLCC (29.29x29.29)

MACH130-15JC (PDF)

690