EP2S130F1020C3
EP2S130F1020C3 ECAD Model
EP2S130F1020C3 Attributes
Type | Description | Select |
---|---|---|
Mfr | Intel | |
Series | Stratix® II | |
Package | Tray | |
Number of LABs/CLBs | 6627 | |
Number of Logic Elements/Cells | 132540 | |
Total RAM Bits | 6747840 | |
Number of I/O | 742 | |
Voltage - Supply | 1.15V ~ 1.25V | |
Mounting Type | Surface Mount | |
Operating Temperature | 0°C ~ 85°C (TJ) | |
Package / Case | 1020-BBGA | |
Supplier Device Package | 1020-FBGA (33x33) | |
Base Product Number | EP2S130 |
EP2S130F1020C3 Datasheet Download
EP2S130F1020C3 Overview
The EP2S130F1020C3 is an FPGA (Field Programmable Gate Array) chip manufactured by Altera Corporation. The chip is part of the Stratix II family of FPGAs and is designed for high-performance applications. It features 130,000 logic elements, 1.2 million system gates, and up to 1,020 I/O pins. The device also includes embedded memory blocks, dedicated multipliers, and hardened IP blocks.
The EP2S130F1020C3 is designed to operate at up to 300MHz and can provide up to 3.2Gbps of bandwidth. It also features advanced power management features, such as dynamic power management and programmable I/O power, to reduce power consumption.
The EP2S130F1020C3 is suitable for a wide range of applications, including high-speed networking, high-performance computing, video processing, and embedded control. It can also be used in applications that require high-speed transceivers, such as 10/100/1000 Ethernet, Fibre Channel, and Serial RapidIO.
The EP2S130F1020C3 is available in a variety of packages, including a ball grid array (BGA), a fine-pitch ball grid array (FBGA), and a pin grid array (PGA). It is also compatible with a variety of development tools, such as the Quartus II design software, the Nios II Embedded Design Suite, and the SOPC Builder. This makes it easy to design and debug applications on the chip.