LC4512V-35FT256C
LC4512V-35FT256C ECAD Model
LC4512V-35FT256C Attributes
Type | Description | Select |
---|---|---|
Mfr | Lattice Semiconductor Corporation | |
Series | ispMACH® 4000V | |
Package | Tray | |
Programmable Type | In System Programmable | |
Delay Time tpd(1) Max | 3.5 ns | |
Voltage Supply - Internal | 3V ~ 3.6V | |
Number of Logic Elements/Blocks | 32 | |
Number of Macrocells | 512 | |
Number of I/O | 208 | |
Operating Temperature | 0°C ~ 90°C (TJ) | |
Mounting Type | Surface Mount | |
Package / Case | 256-LBGA | |
Supplier Device Package | 256-FTBGA (17x17) | |
Base Product Number | LC4512 |
LC4512V-35FT256C Datasheet Download
LC4512V-35FT256C Overview
The LC4512V-35FT256C is a low-power, high-performance field programmable gate array (FPGA) chip designed by Lattice Semiconductor. The device is based on the LatticeECP3 FPGA family and is available in a 256-pin, fine-pitch, thin-shrink small-outline package (TSSOP). It features 35K logic elements, up to 4.8Mbit of embedded memory, and up to 704 I/O pins. The device is ideal for a wide range of applications, including motor control, automotive, industrial automation, aerospace and defense, consumer, and medical.
The LC4512V-35FT256C is capable of operating at a maximum frequency of 500MHz and offers up to 6.5Gbps of serial transceiver performance. It also features a low-power design with a total power consumption of only 1.5W, and supports a wide range of I/O standards, including LVDS, LVCMOS, and HSTL. The device also offers an integrated phase-locked loop (PLL) and a wide range of configurable logic blocks (CLBs), allowing for the implementation of complex logic functions.
The LC4512V-35FT256C is a highly configurable device, offering a variety of features, such as a wide range of I/O standards, a low-power design, and a high-speed serial transceiver. It is ideal for a wide range of applications, including motor control, automotive, industrial automation, aerospace and defense, consumer, and medical.
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Pricing (USD)
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