EPM9560RI240-20
EPM9560RI240-20
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Intel

EPM9560RI240-20


EPM9560RI240-20
F18-EPM9560RI240-20
Active
IC CPLD 560MC 20NS 240RQFP
240-RQFP (32x32)

EPM9560RI240-20 ECAD Model


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EPM9560RI240-20 Attributes


Type Description Select
Mfr Intel
Series MAX® 9000
Package Tray
Programmable Type In System Programmable
Delay Time tpd(1) Max 20 ns
Voltage Supply - Internal 4.5V ~ 5.5V
Number of Logic Elements/Blocks 35
Number of Macrocells 560
Number of Gates 12000
Number of I/O 191
Operating Temperature -40°C ~ 85°C (TA)
Mounting Type Surface Mount
Package / Case 240-BFQFP Exposed Pad
Supplier Device Package 240-RQFP (32x32)
Base Product Number EPM9560

EPM9560RI240-20 Datasheet Download


EPM9560RI240-20 Overview



The EPM9560RI240-20 is a low-power, high-performance, field programmable gate array (FPGA) from Altera. It is based on the Stratix V GX architecture and is designed for high-end applications. It is available in a 240-pin FineLine BGA package and operates at a maximum frequency of 1.2 GHz.


The EPM9560RI240-20 has a total of 9560 logic elements, including 9520 LEs, 40 RAM blocks and 8 DSP blocks. It also features up to 576 user I/Os and up to 4 transceivers. It supports up to 1.5 Gbps transceiver data rates and up to 2.5 Gbps SERDES data rates.


The EPM9560RI240-20 is suitable for a wide range of applications, including medical imaging, wireless communications, industrial automation, automotive electronics, aerospace, and military applications. It is also suitable for high-end embedded applications such as video processing, image processing, and high-speed data acquisition.


The EPM9560RI240-20 is designed for low-power operation, with a typical power consumption of 3.1 W. It also features an on-chip power management system that allows the device to be powered down when not in use. This helps to reduce power consumption and extend battery life.


The EPM9560RI240-20 is a reliable and secure device, with built-in error correction and advanced encryption capabilities. It also features a wide range of on-chip peripherals, including a phase-locked loop, a clock generator, and an on-chip oscillator. It is also compatible with Altera’s Quartus II design software.



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