XC6SLX75-N3FG676I
XC6SLX75-N3FG676I
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Xilinx

XC6SLX75-N3FG676I


XC6SLX75-N3FG676I
F20-XC6SLX75-N3FG676I
Active
IC FPGA 408 I/O 676FCBGA
676-FBGA (27x27)

XC6SLX75-N3FG676I ECAD Model


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XC6SLX75-N3FG676I Attributes


Type Description Select
Mfr AMD Xilinx
Series Spartan®-6 LX
Package Tray
Number of LABs/CLBs 5831
Number of Logic Elements/Cells 74637
Total RAM Bits 3170304
Number of I/O 408
Voltage - Supply 1.14V ~ 1.26V
Mounting Type Surface Mount
Operating Temperature -40°C ~ 100°C (TJ)
Package / Case 676-BGA
Supplier Device Package 676-FBGA (27x27)
Base Product Number XC6SLX75

XC6SLX75-N3FG676I Datasheet Download


XC6SLX75-N3FG676I Overview



The XC6SLX75-N3FG676I is a Xilinx Spartan-6 FPGA chip, designed for high-performance applications. It is a low-cost, low-power FPGA with a maximum power dissipation of 4.3W. It has a total of 675 logic cells, 676 Registers and 675 Flip-Flops. The device is equipped with a maximum of 28Kbits of distributed RAM, and is able to support up to 4.2Mbits of external memory. It also includes a total of 40 user I/O pins, with support for up to four high-speed serial transceivers. The XC6SLX75-N3FG676I is suitable for a wide range of applications, including embedded systems, industrial control, automotive systems, medical equipment, and consumer electronics. It is also suitable for high-speed data processing, image and video processing, and signal processing. It is capable of supporting high-speed digital signal processing (DSP) applications, with a maximum clock frequency of 200MHz. The XC6SLX75-N3FG676I is equipped with a range of features, including a low-power design, low-cost, high-performance, and high-density integration. It is also capable of supporting multiple power domains, as well as on-chip debugging capabilities. In addition, it is also compatible with a range of development tools, such as Xilinx ISE, Vivado, and System Generator. In conclusion, the XC6SLX75-N3FG676I is a low-cost, low-power FPGA chip, suitable for a wide range of applications. It is equipped with a range of features, including a low-power design, low-cost, high-performance, and high-density integration. It is also capable of supporting multiple power domains, as well as on-chip debugging capabilities.


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